Experience

  1. System Architect (Distinguished Engineer)

    Infinera Corp
    • Developed (white-box) requirements for various generations of Infinera ASICs in these areas: G.709 OTN tributary interfaces, FlexE, FlexO, Infinera Proprietary Signals/Formats (used on the line-side interfaces), Overhead processing, Alarm Propagation. Supported the ASIC development team through all stages of development to ensure full compliance to applicable standards.
    • Developed requirements for Layer 1 encryption (AES-GCM, AES-CTR modes) in INFN ASICs: at the ODU layer (in mapper ASIC) & bulk encryption (DSP ASIC). These requirements addressed the following aspects: algorithmic compliance, support for minimizing the cryptographic boundary (for FIPS 140-2 validation).
    • Specified the architecture for supporting protection switching schemes (e.g., 1+1 SNCP, Y-cable) in Infinera transponders and muxponders. This involved the timely reporting of defects to the protection FSMs, FPGA assist to minimize the switching time.
    • Developed requirements for FEC Support for OC3/1GE Optical Supervisory Channels
    • Developed the End-2-End mechanism for Shared Mesh Protection (SMP) for ODU connections. This mechanism has been presented in various contributions to ITU-T SG15 Q9 (OTN Equipment). This work contributed to the ITU-T recommendation G.783.3.
    • Defined the mechanism to support hitless ODUFlex resizing (specific to DTN-X networks). Working with ASIC & Software teams to get the mechanism implemented.
    • Developed requirements related to control channel realization (e.g. trib & line side GCC channels) for several generations of Infinera Network Elements.
    • Developed DTN-X Network Architecture Specification. This specification takes a top-down view of DTN-X networks, and contains an in-depth coverage of these aspects: Layers (i.e. Signals, Formats), Adaptations, OTN atomic function realization, and Defect propagation. This document is used as the basis to derive requirements for the ASICs/FPGAs.
    • Developed DTN Network Element requirements for these areas: GMPLS, L1VPN, Datapath recovery (protection, and restoration).

  2. System Architect

    Fujitsu Network Communications
    • Participated in the architecture definition of the FW9500 hybrid platform that supported TDM & Packet services (e.g. Point-to-Point Ethernet, VPLS) based on MPLS Pseudowires
    • Developed System Level Requirements for VPLS/H-VPLS, Control Plane High- Availability.

  3. Contractor (SW development)

    Nortel
    • RSVP-TE for GGSN node: Wrote Functional Spec, Detailed Design & Designer Test plan. Worked on design changes support for a redundant control processor.
    • BGP/MPLS VPNs for GGSN node: Wrote the Designer Test plan, Added support for MPLS & VRF historical statistics.

  4. Contractor (SW development)

    Avici
    • Resolved software issues related to: PPP, SONET Link Aggregation, MPLS LSP Protection (Fast Reroute).

  5. Contractor (Systems Arch)

    Ciena
    • Specified the functional requirements for the CoreDirector features: Connection Test Access, Connection Loopback, OSI/DCC, 1GE/10GE tunneling with SONET/SDH VCAT/LCAS).

  6. Systems Architect

    Fujitsu Network Communications
    • Part of the team tasked with developing the architecture for the first TDM/Packet Hybrid. Primarily responsible for Layer 2 and Layer 3 VPN support over MPLS networks.
    • Investigated protection of Point-to-Multipoint (P2MP, or multicast) MPLS LSPs, for the purposes of offering a fully protected TLS service.
    • Specified the optical UNI (O-UNI) interface between an MPLS LER (Label Edge Router), and the Optical Network Element (ONE).
    • Specification of Network Element Management Information models, and protocol specific realizations (in terms of TL-1 and SNMP)

  7. Member of Scientific Staff

    Nortel
    • Part of a team defining the End-to-end architecture of a system offering Broadband access.
    • Developed various features for the HFC Cable Modem. E.g. Lightweight ATM signaling protocol, IP NAT (to support multiple attached PCs), Software Upgrade
    • Designed & Developed software for the following layers in the OSI Stack: LAPD (with QoS), Layer 3 (CLNP, IS-IS, ES-IS), and Layer 5 (Session Layer). Implemented performance enhancements at Layers 2 through 4 of the OSI stack
    • Implemented various STREAMs modules (e.g. TPI, Line Discipline Module, Serial Drivers)
    • Implemented a bridge for interconnecting IBM Token Ring LANs via a Frame Relay WAN
    • Analysis, Design, and Implementation of transparent access to (XMS based) remote file servers (via X.25 networks), file transfer utilities.

  8. SW Designer

    Micom
    • Designed and Implemented software for data communication protocols (e.g. BISYNC, SDLC, ISO Transport Layer 4/0, Session/Transport layers for Teletext service)